From fbedf7cf6745178167a8434335b590764740fe72 Mon Sep 17 00:00:00 2001 From: Joseph Ferano Date: Fri, 14 Feb 2025 23:08:45 +0700 Subject: [PATCH] Process mov instruction properly, 01-02-39.asm now decoded properly --- decoder8086.odin | 125 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 97 insertions(+), 28 deletions(-) diff --git a/decoder8086.odin b/decoder8086.odin index 2aaaeac..0c64264 100644 --- a/decoder8086.odin +++ b/decoder8086.odin @@ -51,6 +51,34 @@ instructions := [?]Instruction { } inst_map := make(map[u8]Instruction) +RIGHT_ALIGN_AMOUNT := 30 + +get_instruction :: proc(bytes: []u8) -> (Instruction, u8) { + return {}, 0 +} + +calculate_effective_address :: proc(r_m: u8) -> string { + val: string + switch r_m { + case 0b000: + val = "bx + si" + case 0b001: + val = "bx + di" + case 0b010: + val = "bp + si" + case 0b011: + val = "bp + di" + case 0b100: + val = "si" + case 0b101: + val = "di" + case 0b110: + val = "bp" + case 0b111: + val = "bx" + } + return val +} main :: proc() { ax := registers[0] @@ -72,48 +100,89 @@ main :: proc() { inst_map[inst.encoding] = inst } - if true { + if false { for i in 0..> 6 - reg := (b & 0b00111000) >> 3 - rm := b & 0b00000111 - src_name := is_word ? registers[reg].fullname : registers[reg].bytename - dst_name := is_word ? registers[rm].fullname : registers[rm].bytename - fmt.printfln("mov %s, %s ;; %b %b", dst_name, src_name, prev, b) - read_next = false - continue + processed := 0 + for processed < bytes_read { + curr_byte := data[processed] + if curr_byte & 0b11111000 == 0b10001000 { + is_word := curr_byte & 1 == 1 + flip_src := curr_byte & 2 != 0 + disp_amount := 0 + + next_byte := data[processed + 1] + mod := (next_byte & 0b11000000) >> 6 + reg := (next_byte & 0b00111000) >> 3 + rm := next_byte & 0b00000111 + dst_reg := registers[rm] + + disp: string + if mod == 1 { + disp_byte := (i16)(data[processed + 2]) + disp_amount = 1 + disp = disp_byte == 0 ? "" : fmt.aprintf(" + %d", disp_byte) + } else if mod == 2 { + disp_byte := (i16)(data[processed + 3]) << 8 | (i16)(data[processed + 2]) + disp_amount = 2 + disp = disp_byte == 0 ? "" : fmt.aprintf(" + %d", disp_byte) + } else { + disp = "" + } + src_name: string + if mod == 3 { + // Register-to-register + src_name = is_word ? registers[rm].fullname : registers[rm].bytename + } else { + src_name = fmt.aprintf("[%s%s]", calculate_effective_address(rm), disp) + } + + dst_name := is_word ? registers[reg].fullname : registers[reg].bytename + + if flip_src { src_name, dst_name = dst_name, src_name } + + processed += 1 + ((int)(mod) % 3) + + inst_string := fmt.aprintf("mov %s, %s", src_name, dst_name) + + fmt.printfln("%s %*[1]s %08b %08b", inst_string, RIGHT_ALIGN_AMOUNT - len(inst_string), ";; 1", curr_byte, next_byte) + } else if curr_byte & 0b1111_0000 == 0b10110000 { + is_word := curr_byte & 0b0000_1000 != 0 + reg := curr_byte & 0b00000111 + dst_name: string + imm: i16 + if is_word { + dst_name = registers[reg].fullname + imm = (i16)(data[processed+2]) << 8 | (i16)(data[processed+1]) + processed += 2 + } else { + dst_name = registers[reg].bytename + imm = (i16)(data[processed+1]) + processed += 1 + } + inst_string := fmt.aprintf("mov %s, %d", dst_name, imm) + fmt.printfln("%s %*[1]s %08b %08b", inst_string, RIGHT_ALIGN_AMOUNT - len(inst_string), ";; 2", curr_byte, data[processed + 1]) + + } else { + fmt.printfln("unknown instruction ;; %b", curr_byte) } - if b == 0b10001001 { - read_next = true - is_word = true - } else if b == 0b10001000 { - read_next = true - is_word = false - } - prev = b + processed += 1 } }