asm_files/list-0052.asm

@@ -1,36 +0,0 @@
-; ========================================================================
-;
-; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved.
-;
-; This software is provided 'as-is', without any express or implied
-; warranty. In no event will the authors be held liable for any damages
-; arising from the use of this software.
-;
-; Please see https://computerenhance.com for further information
-;
-; ========================================================================
-
-; ========================================================================
-; LISTING 52
-; ========================================================================
-
-bits 16
-
-mov dx, 6
-mov bp, 1000
-
-mov si, 0
-init_loop_start:
-	mov word [bp + si], si
-	add si, 2
-	cmp si, dx
-	jnz init_loop_start
-
-mov bx, 0
-mov si, 0
-add_loop_start:
-	mov cx, word [bp + si]
-	add bx, cx
-	add si, 2
-	cmp si, dx
-	jnz add_loop_start

asm_files/list-0052.txt

@@ -1,42 +0,0 @@
---- test\listing_0052_memory_add_loop execution ---
-mov dx, 6 ; dx:0x0->0x6 ip:0x0->0x3 
-mov bp, 1000 ; bp:0x0->0x3e8 ip:0x3->0x6 
-mov si, 0 ; ip:0x6->0x9 
-mov word [bp+si], si ; ip:0x9->0xb 
-add si, 2 ; si:0x0->0x2 ip:0xb->0xe 
-cmp si, dx ; ip:0xe->0x10 flags:->CPAS 
-jne $-7 ; ip:0x10->0x9 
-mov word [bp+si], si ; ip:0x9->0xb 
-add si, 2 ; si:0x2->0x4 ip:0xb->0xe flags:CPAS-> 
-cmp si, dx ; ip:0xe->0x10 flags:->CAS 
-jne $-7 ; ip:0x10->0x9 
-mov word [bp+si], si ; ip:0x9->0xb 
-add si, 2 ; si:0x4->0x6 ip:0xb->0xe flags:CAS->P 
-cmp si, dx ; ip:0xe->0x10 flags:P->PZ 
-jne $-7 ; ip:0x10->0x12 
-mov bx, 0 ; ip:0x12->0x15 
-mov si, 0 ; si:0x6->0x0 ip:0x15->0x18 
-mov cx, [bp+si] ; ip:0x18->0x1a 
-add bx, cx ; ip:0x1a->0x1c 
-add si, 2 ; si:0x0->0x2 ip:0x1c->0x1f flags:PZ-> 
-cmp si, dx ; ip:0x1f->0x21 flags:->CPAS 
-jne $-9 ; ip:0x21->0x18 
-mov cx, [bp+si] ; cx:0x0->0x2 ip:0x18->0x1a 
-add bx, cx ; bx:0x0->0x2 ip:0x1a->0x1c flags:CPAS-> 
-add si, 2 ; si:0x2->0x4 ip:0x1c->0x1f 
-cmp si, dx ; ip:0x1f->0x21 flags:->CAS 
-jne $-9 ; ip:0x21->0x18 
-mov cx, [bp+si] ; cx:0x2->0x4 ip:0x18->0x1a 
-add bx, cx ; bx:0x2->0x6 ip:0x1a->0x1c flags:CAS->P 
-add si, 2 ; si:0x4->0x6 ip:0x1c->0x1f 
-cmp si, dx ; ip:0x1f->0x21 flags:P->PZ 
-jne $-9 ; ip:0x21->0x23 
-
-Final registers:
-      bx: 0x0006 (6)
-      cx: 0x0004 (4)
-      dx: 0x0006 (6)
-      bp: 0x03e8 (1000)
-      si: 0x0006 (6)
-      ip: 0x0023 (35)
-   flags: PZ

execution.odin

@@ -8,20 +8,6 @@ import "core:reflect"
 
 get_ip :: proc(cpu: ^Cpu) -> int { return int(cpu.registers[.ip].full) }
 
-get_effective_address_value :: proc(cpu: ^Cpu, id: u8) -> i16 {
-    switch id {
-    case 0: return cpu.registers[.bx].full + cpu.registers[.si].full
-    case 1: return cpu.registers[.bx].full + cpu.registers[.di].full
-    case 2: return cpu.registers[.bp].full + cpu.registers[.si].full
-    case 3: return cpu.registers[.bx].full + cpu.registers[.di].full
-    case 4: return cpu.registers[.si].full
-    case 5: return cpu.registers[.di].full
-    case 6: return cpu.registers[.bp].full
-    case 7: return cpu.registers[.bx].full
-    }
-    return -1
-}
-
 get_operand_value :: proc(cpu: ^Cpu, operand: Operand) -> i16 {
     #partial switch opr in operand {
     case Immediate:
@@ -37,15 +23,6 @@ get_operand_value :: proc(cpu: ^Cpu, operand: Operand) -> i16 {
     case DirectAddress:
         value := i16(u16(cpu.memory[opr+1] << 8) | u16(cpu.memory[opr]))
         return value
-    case MemoryAddr:
-        idx := get_effective_address_value(cpu, opr.addr_id) + opr.displacement_value
-        value := i16(u16(cpu.memory[idx+1] << 8) | u16(cpu.memory[idx]))
-        // fmt.println("Checking", idx)
-        // for i in 0..<6 {
-        //     fmt.printf("%04x ", cpu.memory[int(idx)-3+i])
-        // }
-        // fmt.println()
-        return value
     }
     return 0
 }
@@ -147,25 +124,16 @@ execute_instruction :: proc(cpu: ^Cpu, inst: Instruction) {
     } else if mem_addr,ok := inst.dst.(MemoryAddr); ok {
         #partial switch inst.opname {
         case .MOV:
-            value := get_operand_value(cpu, inst.src)
+            if imm,ok := inst.src.(Immediate); ok {
-
+                // TODO: We need a function that returns the registers to check out
-            effective_addr_val := get_effective_address_value(cpu, mem_addr.addr_id)
+                addr := cpu.registers[.bx].full + mem_addr.displacement_value
-            addr := effective_addr_val + mem_addr.displacement_value
+                if imm.size == .Signed16 {
-            cpu.memory[addr]   = u8(value & 0x00FF)
+                    cpu.memory[addr]   = u8(imm.value & 0x00FF)
-            cpu.memory[addr+1] = u8((u16(value) & 0xFF00) >> 8)
+                    cpu.memory[addr+1] = u8((u16(imm.value) & 0xFF00) >> 8)
-
+                } else {
-            // TODO: We need a way to detect if it's a byte or a word
+                    cpu.memory[addr] = u8(imm.value)
-            // if imm,ok := inst.src.(Immediate); ok {
+                }
-            //     // TODO: We need a function that returns the registers to check out
+            }
-            //     effective_addr_val := get_effective_address_value(cpu, mem_addr.addr_id)
-            //     addr := effective_addr_val + mem_addr.displacement_value
-            //     if imm.size == .Signed16 {
-            //         cpu.memory[addr]   = u8(imm.value & 0x00FF)
-            //         cpu.memory[addr+1] = u8((u16(imm.value) & 0xFF00) >> 8)
-            //     } else {
-            //         cpu.memory[addr] = u8(imm.value)
-            //     }
-            // }
         }
     } else if jmp_offset,ok := inst.src.(Jump); ok {
         jump: bool