JosephFerano

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-15 17:29:37 +07:00

32ddb518e9 Break code up into files, delete C code, organize things better

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-13 21:59:46 +07:00

6909f75b35 Little bit more clean up

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-13 17:51:09 +07:00

d4216d793a Listing 43/44 asm files

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-13 17:50:57 +07:00

3dca2254e1 Add helper proc to clean up the word/byte keyword

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-13 12:46:39 +07:00

460e1a8700 Little bit of clean up and organization

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-12 23:47:03 +07:00

fc02debf65 Last bunch of instructions to get listing 42 fully read

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-12 11:31:34 +07:00

babb07cb43 Segment register for memory addresses and lock string

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-12 11:08:05 +07:00

8967be44a0 Major refactor to define both operands so either can be empty

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-07 19:27:18 +07:00

08ef7d901b IN, OUT, XLAT, LEA, LDS, LES, ADC

JosephFerano pushed to master at JosephFerano/performance-aware

2025-03-07 10:29:47 +07:00

782ff93ace Handle accumulator differently, handle segment registers, handle unary, add instructions

390fedc848 Add more instructions, add segment registers, move types up, read more data

c7ee622847 Rename listing files

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JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-24 20:04:00 +07:00

6365bd73a0 Encode jump offsets, collect instruction lines as strings, print at end

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-23 12:06:16 +07:00

1f9837b256 Change how we detect explicit word sizes, fix data_idx

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-22 22:03:32 +07:00

c1799fcac2 Jump instructions and read opname from 3-bit pattern

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-21 23:35:49 +07:00

446848dffb Generalizing data and operand bracketing, to make add instrunction work

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-21 21:53:32 +07:00

bc0a8b65eb New declarative style instruction definition, generalized parsing

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-16 17:10:51 +07:00

f8f5744cd3 WIP: Separate parsing from printing, the easy way

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-14 23:09:12 +07:00

fbedf7cf67 Process mov instruction properly, 01-02-39.asm now decoded properly

JosephFerano pushed to master at JosephFerano/performance-aware

2025-02-14 13:09:22 +07:00

c5e9cfac44 Parse instruction function

JosephFerano pushed to master at JosephFerano/performance-aware

2025-01-21 22:46:47 +07:00

7c48c5ed90 Debug print encoding map

444510cca2 RegMemMode enum, Instruction struct with 'mov' encodings, plus a map, read bytes

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JosephFerano pushed to master at JosephFerano/performance-aware

2025-01-21 14:50:51 +07:00

86428f0263 Test w flag and print with the bytes in comments

f67f6de0b6 Update building and testing for new odin code

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