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6cd144e292
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WIP Refactor: Instruction parser now works and basic decoding in place
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2024-01-16 10:09:50 +07:00 |
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07d71a18c6
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WIP: Major refactor intending to parse instructions and generate a type
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2024-01-15 22:52:58 +07:00 |
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20d1aed742
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mov_inst and add_inst procedures to avoid too much nesting
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2024-01-15 20:16:01 +07:00 |
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08753ea330
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Immediate to register/memory conditionals condensed
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2024-01-15 12:42:54 +07:00 |
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5b2542b0dd
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Direct Address special case added(MOD 0 R/M 110)
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2024-01-15 12:30:42 +07:00 |
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2a92f04836
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Bug: Cast to i16 was failing, casted unsigned char to sbyte before promoting
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2024-01-15 11:59:51 +07:00 |
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094733ee70
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MOV inst conditional branching cleaned up considerably, cause god it was ugly
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2024-01-15 10:45:08 +07:00 |
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9f7e371a49
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Part01-02: Immedate to register/memory wip, moved EAC from r/m map to function
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2024-01-14 11:37:37 +07:00 |
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3b6381f981
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Part01-02: More mov instructions being handled
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2024-01-13 22:18:26 +07:00 |
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6066e930db
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Part01-01: Listing 38 with multiple mov instructions now working
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2024-01-13 15:51:51 +07:00 |
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285b54e95f
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Struct Register added to have a proper abstraction
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2024-01-13 10:47:06 +07:00 |
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a0157a0759
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Part01-01: Project setup and basic decoding
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2024-01-12 22:28:10 +07:00 |
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