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df105ea3cf
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Generalize with perform_load and perform_store, use bit_set for cpu flags
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2025-03-22 18:54:36 +07:00 |
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831a307975
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Fix and simplify (delete) all the signage stuff
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2025-03-22 15:21:47 +07:00 |
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11ccfe78a9
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Handle Memory movs, change displacement from union to enum
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2025-03-21 20:11:39 +07:00 |
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99fd7fabd7
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Add inst decoded type for better modeling, handle jumps correctly with IP register
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2025-03-21 16:33:58 +07:00 |
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731e5bd45d
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CF, OF, and PF flags, keep values as i16, update ref test script
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2025-03-20 20:22:12 +07:00 |
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5cf4768b80
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Decode then check reference flags, change registers and flags to use enumerated arrays
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2025-03-20 16:13:37 +07:00 |
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08874c4533
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Use an enum to represent registers, parse txt files, check CPU state against expected
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2025-03-20 13:06:33 +07:00 |
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305ac557fa
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Move registers to CPU struct, start working on testing code
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2025-03-20 09:44:41 +07:00 |
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b511c6a620
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Clean up/inline functions and clear out TODOs
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2025-03-20 08:19:20 +07:00 |
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266f7a7900
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Factor out get/set actions to reduce duplication, execute add,sub,cmp and check flags
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2025-03-19 21:10:22 +07:00 |
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863ccfc583
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Convert TBD instruction op names to the actual enum variants, rather than strings
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2025-03-19 21:09:42 +07:00 |
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a91c3d9ba9
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Clean up operand code by removing unnecessary variants
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2025-03-19 18:57:34 +07:00 |
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c312b7fd57
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Fix register logic since we can access high and low parts, it's really ugly
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2025-03-18 21:16:08 +07:00 |
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b78d043b6c
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Add new listings, supply cs register, fix segreg mov instruction
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2025-03-17 21:51:52 +07:00 |
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32ddb518e9
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Break code up into files, delete C code, organize things better
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2025-03-15 17:28:51 +07:00 |
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