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08874c4533
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Use an enum to represent registers, parse txt files, check CPU state against expected
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2025-03-20 13:06:33 +07:00 |
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305ac557fa
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Move registers to CPU struct, start working on testing code
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2025-03-20 09:44:41 +07:00 |
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b511c6a620
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Clean up/inline functions and clear out TODOs
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2025-03-20 08:19:20 +07:00 |
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266f7a7900
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Factor out get/set actions to reduce duplication, execute add,sub,cmp and check flags
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2025-03-19 21:10:22 +07:00 |
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863ccfc583
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Convert TBD instruction op names to the actual enum variants, rather than strings
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2025-03-19 21:09:42 +07:00 |
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fd8f696627
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Listing 46
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2025-03-19 21:07:11 +07:00 |
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a91c3d9ba9
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Clean up operand code by removing unnecessary variants
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2025-03-19 18:57:34 +07:00 |
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c312b7fd57
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Fix register logic since we can access high and low parts, it's really ugly
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2025-03-18 21:16:08 +07:00 |
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b78d043b6c
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Add new listings, supply cs register, fix segreg mov instruction
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2025-03-17 21:51:52 +07:00 |
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118ed482c1
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Add listing 0044.txt, rm test files at the end of script
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2025-03-16 23:55:26 +07:00 |
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6e7783c623
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Bash script to compare expected output, print values in a way that's easy to test
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2025-03-16 23:45:37 +07:00 |
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7e74d1e9a2
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Print registers and execute basic mov instructions
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2025-03-15 22:28:54 +07:00 |
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32ddb518e9
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Break code up into files, delete C code, organize things better
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2025-03-15 17:28:51 +07:00 |
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6909f75b35
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Little bit more clean up
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2025-03-13 21:59:37 +07:00 |
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d4216d793a
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Listing 43/44 asm files
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2025-03-13 17:50:58 +07:00 |
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3dca2254e1
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Add helper proc to clean up the word/byte keyword
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2025-03-13 17:50:32 +07:00 |
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460e1a8700
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Little bit of clean up and organization
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2025-03-13 12:46:25 +07:00 |
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fc02debf65
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Last bunch of instructions to get listing 42 fully read
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2025-03-12 23:46:47 +07:00 |
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babb07cb43
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Segment register for memory addresses and lock string
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2025-03-12 11:31:14 +07:00 |
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8967be44a0
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Major refactor to define both operands so either can be empty
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2025-03-12 11:07:40 +07:00 |
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08ef7d901b
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IN, OUT, XLAT, LEA, LDS, LES, ADC
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2025-03-07 19:27:01 +07:00 |
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782ff93ace
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Handle accumulator differently, handle segment registers, handle unary, add instructions
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2025-03-07 10:14:36 +07:00 |
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390fedc848
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Add more instructions, add segment registers, move types up, read more data
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2025-03-07 10:13:49 +07:00 |
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c7ee622847
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Rename listing files
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2025-03-03 20:40:47 +07:00 |
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6365bd73a0
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Encode jump offsets, collect instruction lines as strings, print at end
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2025-02-24 20:03:18 +07:00 |
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1f9837b256
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Change how we detect explicit word sizes, fix data_idx
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2025-02-23 12:05:56 +07:00 |
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c1799fcac2
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Jump instructions and read opname from 3-bit pattern
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2025-02-22 22:03:14 +07:00 |
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446848dffb
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Generalizing data and operand bracketing, to make add instrunction work
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2025-02-21 23:35:24 +07:00 |
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bc0a8b65eb
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New declarative style instruction definition, generalized parsing
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2025-02-21 21:53:11 +07:00 |
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f8f5744cd3
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WIP: Separate parsing from printing, the easy way
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2025-02-16 17:10:29 +07:00 |
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fbedf7cf67
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Process mov instruction properly, 01-02-39.asm now decoded properly
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2025-02-14 23:08:45 +07:00 |
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c5e9cfac44
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Parse instruction function
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2025-02-14 13:09:18 +07:00 |
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7c48c5ed90
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Debug print encoding map
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2025-01-21 22:46:31 +07:00 |
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444510cca2
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RegMemMode enum, Instruction struct with 'mov' encodings, plus a map, read bytes
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2025-01-21 22:45:49 +07:00 |
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86428f0263
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Test w flag and print with the bytes in comments
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2025-01-21 14:50:30 +07:00 |
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f67f6de0b6
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Update building and testing for new odin code
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2025-01-21 14:50:03 +07:00 |
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0e4aebff13
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Odin port
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2025-01-21 14:20:41 +07:00 |
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021c4573fa
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ADD instruction sign extension bit handled and deleting old code
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2024-01-17 00:51:55 +07:00 |
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26c07aee61
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Types and instruction specifications moved to decode.h
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2024-01-16 21:46:41 +07:00 |
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a0ed11416e
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Instruction parser finished for MOV instructions with corner cases handled
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2024-01-16 21:44:03 +07:00 |
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ca0742de3c
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WIP Refactor: Instruction parsing, decoding and printing split
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2024-01-16 18:27:19 +07:00 |
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8497316768
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WIP Refactor: Instruction parser now works and basic decoding in place
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2024-01-16 10:12:44 +07:00 |
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4754a8cd4c
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WIP Refactor: Instruction parser using a struct
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2024-01-16 10:12:17 +07:00 |
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20d1aed742
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mov_inst and add_inst procedures to avoid too much nesting
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2024-01-15 20:16:01 +07:00 |
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08753ea330
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Immediate to register/memory conditionals condensed
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2024-01-15 12:42:54 +07:00 |
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5b2542b0dd
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Direct Address special case added(MOD 0 R/M 110)
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2024-01-15 12:30:42 +07:00 |
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2a92f04836
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Bug: Cast to i16 was failing, casted unsigned char to sbyte before promoting
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2024-01-15 11:59:51 +07:00 |
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f4d6835694
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ASM test file improved error handling/reporting
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2024-01-15 10:45:46 +07:00 |
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094733ee70
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MOV inst conditional branching cleaned up considerably, cause god it was ugly
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2024-01-15 10:45:08 +07:00 |
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7f094799e9
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OPTION macro revamped with IF_LET_SOME
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2024-01-15 08:07:17 +07:00 |
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